This competition track is formed out of collaboration of three parties, where
Silterra’s CMOS Logic technologies provide optimal combination of performance in term of power, speed and gate density, to meet the stringent product requirement in Consumer, Communication and Computing applications. The Low Power / High Vt CMOS Logic technologies is customized for digital processors used in portable consumer applications.
SilTerra’s 180nm, 160nm and 130nm Mixed-Signal and RFCMOS technologies are built from the proven CMOS Logic platform with additional active and passive RF/analog components. These RF/analog components features high precision MiM ( Metal-Insulator-Metal), Finger Capacitor, Varactor, Diode, Thick Metal Inductors, Deep Nwell, Multi-Vt and High precision resistors which are characterized up to 20GHz range. These technologies are well suited for RF/analog applications used in WLAN, Bluetooth, RFID, Zigbee applications.
SilTerra/CEDEC/Intel track offers analog, mixed-signal, and digital IC design tracks.
Further, SilTerra is expanding into more-than-Moore technologies such as MEMS (Micro Electro Mechanical Systems) including RF MEMS, bio-MEMS, high-power technologies such as BCD, silicon compatible surface and bulk acoustic wave devices, photonics, optical MEMS, etc. The competition participants are thus also free to explore ‘More-than-Moore’ technologies for their design competition projects. The areas need not necessarily be limited to those mentioned above. We encourage the participants to compete in these emerging research areas with a focus on modeling, design, fabrication and materials aspects.
Digital IC design track will require participants to design a hardware and implementing it with silicon design flow. The participants can leverage the Front-End (FE) and Back-End (BE) design flow environment with industrial EDA tools provided by CEDEC. The goal is for participants to showcase their design work on how to enable a low-power and high-quality silicon by emulating the silicon design with Intel FPGA.
Design & Implementation:
Benefits of joining:
Listed below are some of the design ideas for reference. Applicants may propose projects along these ideas or any other VLSI design topics using one of the SilTerra process technologies.
Below is a list of tools SilTerra process technologies supported.
SilTerra’s CL180G (0.18 µm CMOS Logic Generic) baseline technology is process matched to foundry standard and positioned for main-stream digital consumer & communication related applications. The technology offers the best combination of density, speed and power which are supported by a complete set of silicon proven standard design libraries, SRAM compiler, I/O and IP’s.
SilTerra’s CL130G technology (0.13µm CMOS Logic Generic) is a all-copper process features borderless contacts and vias and up to eight layers of metal. This technology offers high speed and high gate density performance which is suitable for design in high speed digital consumer, wired communication and computation related applications.