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Winners have been announced in the grand finale held at Altera, Penang on 11 June 2011. Congratulations to the winning teams!

The MOSTI Innovate Malaysia Award 2011 goes to team MY071 from UTAR with project "Electric Car Intelligent Controller System" from Intel track. The team members are Gan Yu Han, Vincent Cheah Beng Keat, and Gan Guo Dong.

Agilent Track

Prize
Details
First
University: UTAR
Project title: Advance Mechatronics Manipulator
Team members:
Cheng Chia Loon
Chia Kok Siang
Advisor: Dr Tan Ching Seong
Project abstract:
In-Vitro Optically Aided Robotic Manipulation (IVOARM) constitutes a blind grasping concept using two anthropomorphic fingers with the aid of the directional force sensors and infra-red sensors mounted on it. This manipulator is controlled by an embedded system with high DSP compatibility. The infra-red sensors are mounted on the surface of the finger gripper to detect the presence of the object in the area of the grasping. The physical information of the object such as size and centroid of the object is determined using the algorithm developed with the aid by the infra red sensors. The purpose of determining the centroid is to determine the size and method to grasp the object. The result of the object size determination using the IVOARM has been obtained. Based on the size of the object obtained from the calculation, the object will be decided to be gripped in either full envelope gripping or finger tip gripping. Force will be calculated to ensure proper force to be applied.
Second
University: MMU (Cyberjaya)
Project title: Two-Wheeled Balancing Robot
Team members:
Lim Chia Syan
Advisor: Lo Yew Chiong
Project abstract:
A two-wheeled balancing robot is characterized by the ability to balance on its 2 wheels based on the concept of an inverted pendulum. A sensor fusion system is to be used to provide essential feedback for the state and position of the robot while a controlling system ensure the robot is sustained in a balanced state. The main idea of this project is to develop and construct an autonomous two-wheeled balancing robot. This robot will be served as a test platform to investigate the inverted pendulum balancing system and at the same time research will be made on the sensor fusion system as well as controlling system for the balancing robot. Researching on this unique and unbalance system should give more understanding on control theory and implementation on the hardware. In the end of the project, the robot should be able to move freely whilst keeping its upright position not only on flat surface but also ramp surface. In addition, having the two-wheeled balancing robot as the test platform, better understanding on the sensor fusion and controlling system should be archived in the end of the project. Lastly, USB Modular products provided by Agilent should help to archive higher integration between theoretical and practical knowledge in building a two-wheeled balancing robot. This proposal includes the introduction of the project and the descriptions of the use for each Agilent USB Modular product in this project.
Third
University: UM
Project title: Maximum Power Point Tracking For Stand-alone Photovoltaic System
Team members:
Goh Sing Choon
Advisor: Prof Dr Nasrudin Abd Rahim
Project abstract:
This project focus on developing battery charger controller for stand-alone photovoltaic system with maximum power point tracking (MPPT). The proposed system is implemented with single-ended primary inductance converter (SEPIC) to provide a balance power flow from the solar panel to the load such that the output power from the solar panel is utilized effectively. Conventional Perturb and Observe (P&O) algorithm is used to track the maximum power point due to its simplicity and easy implementation. A 25W LEDs driver is also developed to drive 21.7W high power LEDs string at constant current 700mA. The efficiency of the battery charger controller is 83.33% under constant resistive load despite the losses from solar panel, converter and perturbation losses.
Consolation
University: UTHM
Project title: An Alert System to Detect Electromagnetic Radiation
Team members:
Krishnan a/l Nagalingam
Advisor: Prof Dr Mohd Zarar bin Mohd Jenu
Project abstract:
Electromagnetic radiation has been a common concern in most developed and developing countries in terms of the hazard it poses upon human’s health and its capabilities of reducing efficiency of electrical and electronic devices in its surrounding. As a result, numerous devices and researches have been done particularly in detecting and shielding electromagnetic radiation, but the existing devices is usually expensive and bulky, furthermore we don’t know whether it is precise or not, practically. This project has designed a device capable of detecting electromagnetic radiation and respond to the level of radiation precisely by turning on an alarm device which alerts the user. The efficiency of the device has been measured and calibrated so that it could produce a precise detection of the electromagnetic radiation. Since the electromagnetic spectrum band is wide, the study was focused on radiation emitted from mobile phone using GSM900. To scope it down, the study is focused to the transmision band frequency of GSM900 which covers the range of 880MHz to 915MHz. Hence, the detector unit has been designed in a manner that it triggers the alarm device when it detects the radiation exceeds a predetermined safe level. The detector unit includes a radiation receiving microstrip patch antenna, a voltage detector consist of RF logarithmic power detector and amplifier to amplify the received voltage signal from the voltage receiver, a data processor circuit consist of PIC microcontroller chip to calibrate the amplified voltage value correspond to the radiation level that has been detected and trigger the alarm devices accordingly by turning on green, orange and red coloured light emitting diodes with respect to the level of hazardousness each colour represents. The circuitry or hardware part of the detector unit has been calibrated by the aid of simulation software such as CST Microwave Studio and MPLAB. CST Microwave Studio software was used to build the design and size of antenna which plays an important role in enabling the antenna to receive the appropriate frequency range that need to be detected. Where else, MPLAB software was used to program the PIC microcontroller to operate the alarm devices accordingly to the measured radiation level in terms of voltage. Through this study, knowledge on how an electromagnetic radiation detector functions and operates has been gained and enhanced. Moreover, by designing and applying electromagnetic radiation detector unit, the level of microwave electromagnetic radiation exposed by humans in their daily life surrounding such as in their working place or in the house can be detected and the level of  hazardousness it poses on humans can be seen hence appropriate precaution can be taken into consider.
Consolation
University: UniMAP
Project title: Evaluation and Monitoring of WLAN Signal Strengh in Indoor Office Environment
Team members:
Muhammad Ezanuddin bin Abdul Aziz
Khairul Nakhaie bin Abdul Kadir
Muhammad Sofi bin Jamaludin
Advisor: Mohd Fareq bin Abdul Malek
Project abstract:
Wireless Local Area Network (WLAN) technology and its usefullnes has rapidly evolve becoming faster and allowing greater bandwidth for data transfer. Wireless hotspots are now a must for every e-knowledge based service centers and business offices. This lead to signal redundancies, signal harmonics, signal interferences  and signal losses due to the signal strength fluctuating within every hotspot and its nearby hotspot. Placement of partition, cupboards, tables, chairs and other office appliances with its different dielectric value can also contribute to uncertain signal refelction and signal strength issues. As such, an array of antennas will be use and compare to measure the WLAN signal inside an office where distance and postion plays a key factor. Computer generated simulation of the exact office layout will be develop and real measurement will follow up using Agilent equipments. All the signals reading are analyze and to became another hotspot planning guidance with the respect to the 802.11 protocol.
Shortlisted
Project titles:
High Voltage Electrification for Electrogravitics Propulsion
Bluetooth Child Monitoring and Locating System
Bluetooth Solar Recorder System

Altera Track

Prize
Details
First
University: MMU (Cyberjaya)
Project title: Hardware Control using Hand Gesture
Team members:
Lee Sue Han
Siew Wei Heng
Chee Vi Ling
Advisor: Cheong Soon Nyean
Project abstract:
Hoping to make a breakthrough from conventional control mechanisms and explore an intuitive way to control Remote Controlled car, we invented a new system. The system allows the user to use hand gesture to control the RC car replacing the conventional devices such as joy stick and key buttons. Besides providing a way to bridge the gap between the user and traditional physical hardware devices, removing the distance between the user and traditional hardware devices, the objective of this project is to define a general, robust and efficient system for the human to control the remote controlled car (RC car) using hand gesture. By using this new approach, it allows the user to act more naturally since no cognitive effort is required to map the function key to the RC car. This system includes one camera to acquire images, image processing and control unit, the output which is the Remote Controlled car and also monitor for display purpose. Several requirements of the system have been taken into consideration such as image processing speed and image acquisition speed of the camera to achieve real-time video processing. To meet the requirements, the CCD camera TRDB-D5M from Terasic is used in order to provide faster image acquisition. Besides that, Altera DE2 board is chosen to be used as the central unit of the whole system. The board FPGA (Cyclone II) fabric on Altera DE2 board does all the image processing and control. FPGA provides an alternative to use serial processors, increasing the real-time video processing efficiency.
Second
University: UTM
Project title: Development of Digital Testing Platform for Functional and Delay Faults using FPGA
Team members:
Wong Jia Huey
Advisor: Dr Ooi Chia Yee
Project abstract:
Automated Test Equipment (ATE) is very expensive and often costs up to million dollars that become huge burdens among most universtities and industrial based companies. Therefore, it is crucial to design and implement a affordable digital testing platform for Functional and Delay Faults for DUT and CUT, since both functional and delay faults are the most popular fault models used for testing purpose. For educational purpose, students able to understand well the testing techniques and concepts on how automatic test pattern generation (ATPG) and response compaction works. For the project implementation, this project presents the design of System-on-a-Chip (SoC) for a digital testing platform using Altera DE2 board. VHDL code is used as the hardware description language for this project. The main objective of this project is to design a pseudorandom test pattern generator which consisting of different test lengths of linear feedback shift register (LFSR) and  multiple input signature register (MISR) as a response compactor to perform functional test on Device Under Test (DUT) and Circuit Under Test (CUT). For delay fault test, functional test on fast clock technique is apply on DUT and CUT. The DUT is build using DIP socket as an external circuit. The operation of this platform starts with injecting the test patterns generated by LFSR test pattern generator to the DUT and CUT. After that, the responses from the DUT and CUT are being captured and compacted by the MISR as response compactor. The actual signature which is the compacted response of the DUT and CUT is then compared with the reference signatures (fault-free circuit of the same type) which have previously been stored in the RAM. A Graphical User Interface (GUI) is developed to display before and after testing results for both DUT and CUT. UART is used to perform data communication between GUI and SoC. For delay fault test, fast clock will be applied on the DUT and CUT to check whether the outputs of the DUT and CUT are correct in a short period. For the expected outcome, the proposed testing platform is capable to detect the functional and delay faults on DUT and CUT. In conclusion, this project is very important for student to expose themselve in understanding well the testing techniques and concepts.
Third
University: UTM
Project title: Self-Testable Discrete Wavelet Transform System-on-Chip
Team members:
Leong Wei Sun
Advisor: Dr Ooi Chia Yee
Project abstract:
Advancements in semiconductor technology have led to more complex System-on-Chip (SoC) designs. The SoC sizes range from 20-50 million transistors, with integrated logic, dynamic random access memory (DRAM) and analog circuit. Due to its high complexity and density, SoC testing problems have become crucial. In this project, a Discrete Wavelet Transform (DWT) SoC is designed such that it has self-testing feature. DWT is chosen as the SoC in this project because it is the main core of JPEG 2000 system which is widely used in image and video applications. JPEG 2000, an international still image compression standard, is well tuned for diverse applications and it provides a rich set of features not available in its predecessor JPEG.DWT isapplied instead of discrete cosine transform, toremove blocking of image which has been pointed out as theworst problem of JPEG. Due to complex data flow and intensive arithmetic computation, a pure software solution of DWT system is very flexible but would present performance bottlenecks. On the other hand, a full hardware implementation might not utilize the flexibility of the DWT algorithm. To optimize the system performance and lower its cost on hardware implementation, a co-design approach is implemented on this DWT system design. Hardware acceleration is used for the digital signal processing (DSP) tasks, leaving data formation and manipulation to software.Besides, in order to make the DWT SoC self-testable, a built-in-self-test (BIST) feature is included in the SoC design. A Linear Feedback Shift Register (LFSR) with primitive polynomial is designed to generate pseudo random test patterns, which will be sent to the DWT system. To get the test result, output responses obtained are compared with the golden signatures. All hardware design of this project is coded in Verilog hardware description language while C++ programming language is used for software design. The architecture of the whole self-testable DWT SoC design is implemented into an Altera DE2 board and its functionality has been verified through hardware emulation of Altera Cycone II FPGA. As a result, a DWT system with 3 operation modes has been developed, namely forward DWT, inverse DWT and self-testing mode. In the first mode, the original image is converted into “sub-bands”, which are classified by the component of frequency. The reversed process is performed in the second mode, while the system hardware functionality test is executed in last mode. In short, a self-testable discrete wavelet transform system-on-chip that can detect faults by itself has been developed for JPEG2000 standard, providing foundations for real-time image processing applications.
Consolation
University: USM
Project title: Sign Signal Translation System Based on Altera's FPGA DE2 Board
Team members:
Neo Kuo Chue
Advisor: Dr Haidi bin Ibrahim
Project abstract:
Nowadays, computer interaction is mostly done using hardware devices such as mouse, joystick and keyboard. In recent years, human hand posture recognition has grabs much attention of many researchers around the globe for developing human-computer interaction (HCI) systems. Besides that, sign signal or sign language is one of the medium of communication and exchanging ideas especially for those hearing impaired or when verbal communication is almost impossible. The aim of this proposed project is to develop a system based on Altera’s DE2 board to perform sign signal translation on the image that contains hand gesture posed by a signer. The sign signal translated is mainly suitable to be used in the remote control applications. Numerous image processing algorithms and hand posture recognition techniques had been introduced over last few decades. An simple yet efficient algorithm and technique will be developed for translating the sign signal. In the end of this project, the proposed system is expected to be able to perform image processing in faster speed and high accuracy of posture recognition that is not less than 90%. Further literature review and researches still need to be carried out to make this project a success.
Consolation
University: UTAR
Project title: Implementation of a Soft Core Processor on an FPGA
Team members:
Woo Chi Liang
Advisor: Florence Choong Chiao Mei
Project abstract:
In today’s modern, FPGAs has comes with embedded soft-core that can be customized for given application and synthesized for an FPGA target. In many applications, soft-core processors provide several advantages over custom designed processor such as cost, flexibility, platform independence and greater immunity to obsolescence. On the other hand, with today’s sensitivity of data and privacy, cryptology had become a demanding application. The latest cryptology that been proven to be most efficient and effective is AES (Advance Encryption Standard). AES or Rijandael algorithm is propose by two Belgian cryptographers, Joan Daemen and Vincent Rijmen to NIST (National Institute of Standards and Technology) when a new standard of encryption is request. However, due to the growing of the mass of our data, process for AES encryption and decryption come into the problem. AES algorithm mostly was performed in software platform which will take long time of processing. In this paper, the combination of hardware and software implementation on AES algorithm will be discussed. Several version of hardware and software co-design have been introduced to the market lately, these implementation will be review and discuss on their implementation method, theory, and complexity of the implementation. As the growing of the soft-core of the FPGAs, it is expected that the usage of it customizable characteristic would make the soft-core processor to be more widespread and involve in complexity embedded system in the future.
Shortlisted
Project titles:
Fly Algorithm on Surveillance Camera for Crowd Image Detection Analysis
Development of a Baby-Friendly Home Automation
Digital Smart Home
Motion Control Robot Arm
Development of FPGA to Control BLDC Motor Using Altera Development Board
Solar Tracker Using Altera Development Board
Single Sensor Anaglyph Camera System
Real-time Video Object Recognition and Tracking System in Gaming
Artificial Neural Network Character Recognize
Vehicle Collision-Avoidance System for Motorsport Application
Image Converter Module with Audio Feature

Intel Track

Prize
Details
First
University: UTAR
Project title: Electric Car Intelligent Controller System
Team members:
Gan Yu Han
Vincent Cheah Beng Keat
Gan Guo Dong
Advisor: Dr Chew Kuew Wai
Project abstract:
The Electric Car Intelligent Controller System project aims to create a multiple platform controller that can control each and every function needed to be implemented in an electric car system such as battery management system, inverters, amplifiers, voltage converters, constant current controllers etc. The main problem that we face is most common microcontrollers that we usually use in our university assignments and projects such as PIC is not powerful enough to control multiple platforms in our electric car intelligent controller system. Even by using a few of the most powerful PICs, we will not be able to guarantee the reliability to control complex systems such as the Lithium-ion battery management system. However, with the Intel Atom processor platform, to achieve this level of reliability and functionality is possible. The approach that we take to implement this project is by delegating the task specifically to all three members of our team. We have a project manager who organizes the overall development and implementation of the project and day to day operations. The project manager must also understand the strengths and limitations of the hardware and software provided, have people skills and organizational skills, convey information from the work done, manage the budget, meet dateline and ensure every task delegated is completed successfully. The other two team members are in charge of the main aspects of hardware and programming software provided. However, every member is free to provide assistance to each other whenever needed. Finally, we expect our electric car to have a comprehensive intelligent controller system that can manage the battery profile accordingly, display the level of charges left in the battery on a monitor, interact with the user's commands accurately to operate the hardware, regulate the speed of the motor accordingly to the acceleration applied, ensure the safety aspect of the vehicle is always in good condition and display warnings if something is not right, manage the thermal or temperature level of the battery and controller accordingly and provide an alarm indicator if overheating of components occurs and many more. To conclude, the Intel Atom processor will provide us with the perfect platform to implement our system with reliability, confidence, comprehensive functionality, more accurate management control etc.
Second
University: MMU (Cyberjaya)
Project title: SMART Transit System
Team members:
Choo Wern Shin
Lim Zi Yang
Advisor: Dr Tan Wooi Haw
Project abstract:
An efficient and convenient transit or public transport system plays a vital role in modern countries. As a developing country, the public transports of Malaysia still have plenty of rooms for improvement especially for achieving the goal of Wawasan 2020. The implementation of the Secure, Manageable, Augmented, & Route Tracking (SMART) Transit System is to provide safe and secure rides, ease towards management system, augmented ride experience and route tracking system for the public transportation in Malaysia. A GSM system is implemented in each transit, linking all of them to a centralized system at real time via SMS services. The centralized system keeps track of the information of all the transits such as drivers' details, drivers’ working hour, transits’ location, transits’ speed and transit’s revenue. This allows the authorities to have the entire management system right at their fingertips where physical presence on sites is no longer needed. Safety and security of the transits are being implemented and monitored by panic system which could be triggered automatically or manually, notifying the centralized system immediately. The bus is further enhanced by streamlined interfaces such as display system, ticketing system, as well as intranet system to enhance the experience of each and every one of its passengers. The SMART Transit System is meant to bring the public transportation to a higher level, where taking transits will no longer be a boring routine, but leisure in the midst of passengers’ hectic lifestyle.
Third
University: MMU (Melaka)
Project title: Brain Computer Interface Control of Electrical Powered Wheelchair
Team members:
Alfonsius Geraldi
Advisor: Dr Loo Chu Kiong
Project abstract:
To be able to navigate around freely is a crucial essence for disabled users, especially individual who has motor neuron diseases (MND), to have a better quality of life. This work presents the notion of assistive technology achieved by Intel Desktop Board D510MO Platform as user-wheelchair interface based on motor imagery electroencephalogram (EEG) signal to pilot an Electric Powered Wheelchair (EPW). Intel Desktop Board D510MO Platform is proposed as central controller to capture, detect and process EEG signal. Time dependent fractal dimension based on Katz’s method and classification based on Fuzzy k-nearest neighbours (FKNN) are deployed as real time brain computer interface (BCI). Moreover, a motion profile generator (MPG) based on state machine is developed and executed in this platform to convert classified EEG signal into motor signal and actuate EPW navigation. The BCI has been verified empirically under a number of experiments to justify the feasibility and performance of the proposed EEG-based brain computer interface (BCI) and control strategy.
Consolation
University: MMU (Melaka)
Project title: Smart Office
Team members:
Chin Wei Hong
Tan She Yong
Tan Mei Yan
Advisor: Dr Lim Tien Sze
Project abstract:
With more than 120,000 vehicles going to and fro daily, the accident rate on Penang Bridge is extremely high. Most of the accidents were happened during traffic jam which normally involved more than two vehicles. Car breakdown is also one of the major factors that affect the traffic flow. The traffic jam usually takes one or even longer hour to ease during heavy traffic flow at peak hour. The accident rate can be reduced by having digital signboard and to fluent the traffic. The digital speed limit signboards display appropriate speed limit according to the traffic flow. Thus, users of the road will be more cautious on their vehicle speed.  Intel Atom processor-based desktop board and image processing technique are being used to determine the traffic flow. This system is designed to perform vehicle count, traffic jam monitoring, speed limit display that will changed automatically due to the traffic flow, accident detection, rain detection and caution sign display when there is an accident found. Overall, this system works as a guide for road users to know the situation or traffic flow on the road and thus enabling them to control their vehicle speed.
Consolation
University: UTAR
Project title: Digital Speed Limit Monitoring System
Team members:
Tan See Hui
Ong Chu En
Lien Jing Ming
Advisor: Dr Yap Vooi Voon
Project abstract:
With more than 120,000 vehicles going to and fro daily, the accident rate on Penang Bridge is extremely high. Most of the accidents were happened during traffic jam which normally involved more than two vehicles. Car breakdown is also one of the major factors that affect the traffic flow. The traffic jam usually takes one or even longer hour to ease during heavy traffic flow at peak hour. The accident rate can be reduced by having digital signboard and to fluent the traffic. The digital speed limit signboards display appropriate speed limit according to the traffic flow. Thus, users of the road will be more cautious on their vehicle speed.  Intel Atom processor-based desktop board and image processing technique are being used to determine the traffic flow. This system is designed to perform vehicle count, traffic jam monitoring, speed limit display that will changed automatically due to the traffic flow, accident detection, rain detection and caution sign display when there is an accident found. Overall, this system works as a guide for road users to know the situation or traffic flow on the road and thus enabling them to control their vehicle speed.
Shortlisted
Project titles:
Intelligent Contactless Robot Follower Using Neural Network
Marker Base Human Gait Classification System
Botttling Machine for Pharmaceutical Purposes
Development of an Early Detection Embedded System for Overturned Vehicles
Warung-Style Vending Machine
Smart Console for Remote Traffic Light System
E Fitness with 3D Technology
PC Based Home Automation Control with Speech Recognition and Network
An Embedded Network Based Smart Camera for Intruder Detection
Webcam-Based Vision System for Autonomous Mobile Robot
Car Safety System
Smart Home System Using Controller Area Network
Wireless LAN Traffic Monitoring System using Single Board Computer
Hand Gesture/Sign Language Recognition
Image Processing Paralellism (Distributed Approach)
Development of Embedded Operating System Benchmarking Tool

News Releases

The Star: Brainstorming pays off for Utar team at design contest
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